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Re: Inner-loop optimization regression from 3.3 to 3.4


> On Fri, Oct 17, 2003 at 04:10:02PM +0200, Jan Hubicka wrote:
> > + 	/* Convert (a >= 0) into (a >> (bits_per_mode - 1)) != -1.  */
> 
> Comment's wrong.
> 
> > + 	if (op1 == const0_rtx && BRANCH_COST > 1)
> > + 	  {
> > + 	  nonnegative:
> > + 	    return expand_simple_binop (GET_MODE (op0), ASHIFTRT, op0,
> > + 				        GEN_INT (GET_MODE_BITSIZE
> > + 						 (GET_MODE (op0)) - 1),
> > + 					NULL_RTX, 1, OPTAB_DIRECT);
> 
> Overall this looks reasonable.  It does however need to check rtx
> costs a lot more.  On Alpha for instance, LT is 2 to 6 times cheaper
> than ASHIFTRT, depending on how you count costs.  I think ia64 has
> similar issues with its shifter.
Hmm, OK but how one compare rtx costs and branch costs?
Or you mean just check whether the proposed sequence is cheaper than
sequence of two setcc patterns and logical?
I will try to put together something for the second and send updated
patch.

Honza
> 
> 
> r~


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