This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Compiler optimization?


On Tue, Jun 10, 2003 at 05:41:13PM -0700, Chirag Wighe wrote:
> I am an embedded developer and I am trying to understand the endian issues 
> with respect to compilers and how they access structure fields.
> 
> Consider a structure defined as follows
> 
> typedef struct _s1
> {
> UINT32 f;
> UINT16 f1;
> UINT16 f2;
> } S1
> ;
> 
> and code something like this:
> 
> S1 s;
> void foo (void)
> {
> s.f1 = 0x0123;
> s.f2 = 0x4567;
> }
> 
> Is it possible for an optimizing compiler to combine the two half word 
> writes into a single word write.

Yes, though GCC currently does not do this, who knows, a future version might.

> The compiler will form a single 32 bit 
> immediate value and do a word write thus saving one write cycle. This would 
> however cause problems if the memory where the code is data is being stored 
> is defined with an endian attribute other than that of the CPU as it will 
> lead to a reversal of the order of the structure fields.

Obviously the 32-bit constant that would be stored depends on the
endian-ness of the target.

If you need to assure that the word writes remain distinct (perhaps
because the struct really refers to memory-mapped machine registers)
you would need to declare s as volatile.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]