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Re: An issue for the SC: horrible documentation quality of GCC
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: kenner at vlsi1 dot ultra dot nyu dot edu (Richard Kenner)
- Cc: jh at suse dot cz, gcc at gcc dot gnu dot org, Richard dot Earnshaw at arm dot com
- Date: Sat, 10 May 2003 13:07:14 +0100
- Subject: Re: An issue for the SC: horrible documentation quality of GCC
- Organization: ARM Ltd.
- Reply-to: Richard dot Earnshaw at arm dot com
>
> No, it's a dead machine. I was just giving that as an example of the sort
> of problems you can get into by blindly replacing registers by constants.
>
Actually, there's a case in reload_cse where exactly the opposite is done:
a constant is blindly replaced by a register with no regard to the cost.
On ARM this can be detrimental when the constant is a shift specifier, so
mov r0, #5
mov r1, r2, lsr r0
is at least a cycle slower than
mov r0, #5
mov r1, r2, lsr #5
R.