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Porting GCC to Zilog z80
- From: "Alexander Aganichev" <aaganichev at yandex dot ru>
- To: gcc at gcc dot gnu dot org
- Date: Wed, 7 May 2003 13:33:33 +0400 (MSD)
- Subject: Porting GCC to Zilog z80
- Reply-to: aaganichev at yandex dot ru
Hi!
I'm playing with the gcc patches made by Brahmaiah Vallabhane. I have ported them to gcc 3.2.3 and cleaned up. I'm aware of copyright problem, but this is not currently
an issue since I plan to rewrite them once the GCC architecture will be clear to me.
The main question for me at this time is how to properly handle z80 registers. We
have the following general purpose registers on z80 platform:
A - 8-bit
BC, DE, HL - 16-bit, which in it's own turn can be used as 8-bit B, C, D, E, H, and L
IX, IY, SP - 16-bit
There are undocumented IXL, IXH, IYL, and IYH registers, but I doubt good compiler
should rely on undocumented features (at least not usem by default).
So, the question: should BC, DE, and HL registers be defined for the compiler as
16-bit or as splitted 8-bit? If they used to be 16-bit registers then how to split
them (f.e. djnz instruction works only with B register and I want gcc to generate
it)? I've tried to learn this from the i386 code but unfortunately I don't
understand how the gen_lowpart() and gen_highpart() calls working. Can they be
used for this purpose or I'm on the wrong way?
Thanks for any help.
--
Alexander Aganichev
url: http://aaganichev.narod.ru
e-mail: aaganichev@yandex.ru
gsm: +7-095-786-1339