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Re: Reload question
- From: Joern Rennecke <joern dot rennecke at superh dot com>
- To: Eric Botcazou <ebotcazou at libertysurf dot fr>
- Cc: gcc at gcc dot gnu dot org
- Date: Wed, 19 Mar 2003 12:29:34 +0000
- Subject: Re: Reload question
- Organization: SuperH UK Ltd.
> Sparc has a non-offsettable REG+REG addressing mode. Now the compiler is
> unable to reload the following address:
> (mem/s:SI (plus:SI (plus:SI (reg/f:SI 22 %l6 [767])
> (reg:SI 21 %l5 [769]))
> (const_int 4 [0x4])) [16 dense.eden+0 S8 A64])
This address looks suspicious to start with. Where does it
come from? The only kind-of legitimate way I can think of
is if you want to rematerialize reg+reg, and this has
suceeded because both registers are function invariants.
Which doesn't really sound plausible.
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