This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: An unusual Performance approach using Synthetic registers, and a request for guidance.
- From: "Bonzini" <bonzini at gnu dot org>
- To: <gcc at gcc dot gnu dot org>
- Cc: <ja_walker at earthlink dot net>
- Date: Fri, 27 Dec 2002 12:54:01 +0100
- Subject: Re: An unusual Performance approach using Synthetic registers, and a request for guidance.
That's not unusual. If one had, say, to write a back-end for the 6502, one
might think of representing the zero-page as caller-save registers, and hide
the weeny three registers A,X,Y from the middle-end (using them only
internally, or very near to this). I also hope that because of the good L1
coherency of the stack, this might pay well on the x86 as well. The only
problem might be in the lack of orthogonality in the x86 instruction set.
Go ahead, and good luck!
Paolo