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Re: [RFC] Gcc and harvard architectures (towards AVR)


"Svein E. Seldal" <Svein.Seldal@solidas.com> writes:

> Hello,
> 
> How are Harvard architectures handled in gcc? Let me take you in on a
> little discussion:
> 
> Lets imagine a processor which have more than one address-spaces (thus
> the architecture type Harvard). In most processors we are talking
> about code-space and data-space, but there might as well be
> more. These CPU's have a set of operators to access the data-space and
> another set of operators to access the code-space. CPU's like
> microcontrollers and high-performance DSP's are typical users of this
> architecture because it yields high data throughput. Because the
> application data and the program code is transferred simetaneously on
> separate internal buses.

[...]

> 
> I have a technical suggestion for how to implement this, but I would
> like to discuss the issue in a general basis before entering the
> detailed discussion.

Look to archive.
Subject: Segment register support for the i386
Date: 31 Dec 1999

Denis.


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