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[basic-improvements-branch] corruption somewhere...


Haven't debugged this much, but I ran into this trying to build a
mips64-elf toolchain:

(gdb) p insn
$3 = 0x400a524c
(gdb) pr
(insn:HI 43 41 44 0 0x40096e80 (reg/v:DI 182) 36 {mulsi3_r4000}
(insn_list 41 (nil))
    (expr_list:REG_DEAD (reg:SI 212)
        (expr_list:REG_DEAD (reg:SI 193)
            (expr_list:REG_UNUSED (scratch:SI)
                (expr_list:REG_UNUSED (scratch:SI)
                    (expr_list:REG_UNUSED (scratch:SI)
                        (nil)))))))

Whereas, of course, that is supposed to match this pattern:

(define_insn "mulsi3_r4000"
  [(set (match_operand:SI 0 "register_operand" "=d")
	(mult:SI (match_operand:SI 1 "register_operand" "d")
		 (match_operand:SI 2 "register_operand" "d")))
   (clobber (match_scratch:SI 3 "=h"))
   (clobber (match_scratch:SI 4 "=l"))
   (clobber (match_scratch:SI 5 "=a"))]
  "TARGET_MIPS4000 && !TARGET_MIPS16"
  "*
{
  rtx xoperands[10];

  xoperands[0] = operands[0];
  xoperands[1] = gen_rtx_REG (SImode, LO_REGNUM);

  output_asm_insn (\"mult\\t%1,%2\", operands);
  output_asm_insn (mips_move_1word (xoperands, insn, FALSE), xoperands);
  return \"\";
}"
  [(set_attr "type"	"imul")
   (set_attr "mode"	"SI")
   (set_attr "length"   "12")])		;; mult + mflo + delay

Anyhow, I'll debug more, but I was just posting this if anyone else has
run into it.

-eric

-- 
Yeah, I used to play basketball...


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