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Need help restricting a shift instruction's shift count operand to a specific general purpose register


Hi,

I'm working on a port to a CPU that has 16 general purpose registers
with a strange restriction. Shift instructions can have the shift count
value either
1) as an immediate (constant) value or 2) as a register value that can be in
any
of the general purpose registers EXCEPT register 0 (yea, strange).
Register 0 is not special otherwise for other arithmetic operations
(addition, subtraction, exclusive or, inclusive or, logical and, ...).

Please point me at some examples of similar instruction restrictions in "md"
files!

I get the following error from my code in the 3.1.1 compiler:

test_shift.c:143: unable to generate reloads for:
(insn 28 88 34 (set (reg:HI 0 R0 [25])
        (ashift:HI (reg/v:HI 9 R9 [23])
            (reg/v:HI 8 R8 [22]))) 38 {*my.md:1774} (nil)
    (nil))
test_shift.c:143: Internal compiler error in find_reloads, at reload.c:3558

Thanks,
Mike


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