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Tr:Rep:Re: gcc-specific array operator in C


Maybe this could interrest some other people. 

The Dan answer was that isn't the way gcc go.

nicO

---

Thanks for a so quick answer !

Nice new feature.

But when i spoke about array operator i think about :
float f1[10000], f2[10000], f3[10000]; /*imaging signal processing
code*/
f1=f2.+f3; /*i use .* like matlab to avoid confusion */

V4SF is a good stuff but hardware support is only done if the machine
have a regiter size of 4*32=128 (like SSE) if the size is different you
can't use (easly) hardware support. Why not try to considere the SIMD
register of the NEC ESS (64k if i have good memory).

Manipulating arbitrary size of array could produice far better machine
code. Compiler could use prefetech and strip mining that couldn't be
used if the packed size is too small.

i give the example of vector OP Vector -> Vector, but Vector OP Scalar
-> Vector or Vector OP Vector -> Scalar could be very interresting too.

Imagine a = f1 MAC f2 .

this could be translate by (sizeof(f1)==sizeof(f2)):

a=0;
for(i=0;i<sizeof(f1);i++)
{
   a+=f1[i]*f2[i];
}

which is not really good (execpt if the compiler is really smart:)

better way if sizeof(f1) is /4:
a=0;
tmp1=0;tmp2=0;tmp3=0;tmp4=0; pf1 = f1; pf2 = f2;
for(i=0;i<sizeof(f1);i+=4)
{
   pf1+=i;pf2+=i;
   prefetch(f1,GOOGDISTANCE); prefetch(f2, GOODDISTANCE);
   a=(tmp1+tmp2)+(tmp3+tmp4);
   tmp1=pf1[0]*pf2[0];
   tmp2=pf1[1]*pf2[1];
   tmp3=pf1[2]*pf2[2];
   tmp4=pf1[3]*pf2[3];
}
In that case, you reduice dependancies between instructions and pipeline
prefer that much better. You could also unroll the loops.

I could imagine others tricks but strip mining work only with 2
dimentions but i imagine that some case existe.

Regards,
nicO

-----Message d'origine-----
De: Daniel Berlin <dberlin@dberlin.org>
A: "Nicolas Boulay" <nicolas.boulay@ifrance.com>
Date: 02/10/02
Objet: Re: gcc-specific array operator in C


On Wednesday, October 2, 2002, at 08:30  AM, Nicolas Boulay wrote:

> Hello,
>
> I'm working in the f-cpu team. This project is to design a "free" cpu.
> It will be mainly SIMD (like SSE, MMX, altivec,...) for performance
and
> hardware simplicity raison.
>
> As you know compiler aren't really nice with such feature. Vector
> compiler aren't common at all.
>
> I have seen that GCC introduice new data format and MACRO to access 
> such
> feature. That's nice for avoiding using ASM code but that's not 
> portable
> at all.

Actually, macros aren't necessary at all to use SIMD in gcc.
And binary operators on vector data types already works.
So you can portably do vector programming, like so:

int main(void)
{
float a __attribute__ ((mode (V4SF))) = { 1.0, 2.0, 3.0, 4.0};
float b __attribute__ ((mode (V4SF))) = { 1.0, 2.0, 3.0, 4.0};
a = a * b;
}

(V4SF = Vector of 4 Single Floats)
This will compile and work on all platforms (IE with or without vector 
hardware).
On those with vector hardware, it'll use the vector operations 
(assuming GCC has been informed they exist).
Otherwise, it'll synthesize the necessary operations.

You'll need GCC CVS to use this code, I don't think the code to allow 
binary and unary ops on vector datatypes was added until  after 3.2.

--Dan


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