Re: Performance regression

[Dale Johannesen <dalej at apple dot com>]

On Tuesday, September 24, 2002, at 07:16 PM, Roger Sayle wrote:
> 	unsigned char foo(int x, unsigned char q) {
> 	  register unsigned char xc = x>>16;
> 	  return xc + (unsigned int)(255 - xc)*q;
> 	}
>
> Now xc could appear in the RTL as (subreg:QI (ashiftrt:SI .. )).
> In this case, the high bits of the register storing xc are
> undefined, left over from the high bits of x.  Now, if GCC uses
> a subreg:SI (reg:QI ...)) instead of a zero_extend, the high
> bits will never be cleared leading to incorrect code.
>
> [Can you check whether the original GCC behaviour produced
> invalid code on PPC for the example above?]
No it doesn't.  The original generated code is
   set (reg:SI) (ashiftrt:SI...
   set (reg:SI) (zero_extend:SI (subreg:QI...
which is merged by combine into
   set (reg:SI) (zero_extract:SI (reg:SI)(8)(8)
The latter is a single instruction on ppc, so it's actually doing a 
good job here.
This behavior is unchanged by your patch.