Re: Performance regression

[Richard Earnshaw <rearnsha at arm dot com>]

> 
> Richard Earnshaw wrote:
> > I found that I got significantly better code on the ARM when I rewrote the
> > movqi expander to for load-byte(mem) to use
> >
> >           if (GET_CODE (operands[1]) == MEM && optimize > 0)
> >             {
> >               rtx reg = gen_reg_rtx (SImode);
> >
> >               emit_insn (gen_zero_extendqisi2 (reg, operands[1]));
> >               operands[1] = gen_lowpart (QImode, reg);
> >             }
> >
> > Of course, you can only do this during initial expansion (when you can
> > create new pseudos).  The change meant that we never use implicit
> > zero-extension operations so the compiler was able to remove several
> > zero-/sign-extend operations which were clearly redundant.
> 
> I like this solution.  I wasn't sure whether this would work or might
> interact strangely with other parts of the compiler, but the ARM
> back-end is "proof by implementation".
> 

It follows the general principle of "make everything the machine does 
explicit in the RTL" which is good.  It isn't perfect, there are cases 
where a variable can be accessed in both a signed and an unsigned manner 
and in that case it can fail to cse the two loads, but I've generally 
found it to be a win over having an implicit extension.

R.