Dependence between Control Register and instruction

[umar janjua <umarj at enabtech dot com>]

> Let us suppose that we have an add  instruction that depends on  certain
> bits in the control register. Whenever i need to 
> perfom the add operation, I am required to set those bits before the
> operation and clear them afterwards. So that they
> remain unchanged for later operations. In this case, it is necessary that
> we have an optimised output. for example if we 
> have the assembly instructions like
> 
> clear_control_register
> add_insn1
> set_control_register              //  these two 
> clear_control_register           //   can be removed
> add_insn2
> set_control_register
> ........
> ......
> ......
> should be optimized as
> 
> clear_control_register
> add_insn1
> add_insn2
> set_control_register
> 
> Similarly, if the add operation is loop invariant, then the compiler
> should also move the set and clear instructions along the add operation
> outside the loop.
> 
> Solution 1)
>  I can hardcode the set and clearing of bits with in the define_expand
> addm3 pattern. Then define the peephole patterns for eliminating the
> useless and extra set and clear instructions. However, this method
> involves lot of overhead for large number of instructions and fails to
> work when we have other instructions in between .
> 
> Solution 2)
> I can generate the RTL for set and clear operation , but here I do not
> know how to create dependency between the add insn and the insn for set
> and clear, so that compiler knows that add insn is dependent on the bits
> in control register set by earlier instruction. Though I have used ( use
> (reg:CC X) ) to show that add insn is using the control register bits, but
> that does not seem to work.
> 
> I need urgent suggestions 
> 
> Regards
> S Rauf