This is the mail archive of the
mailing list for the GCC project.
Re: negation of float on H8300
- From: Jim Wilson <wilson at redhat dot com>
- To: Alan Lehotsky <apl at alum dot mit dot edu>
- Cc: Andreas Schwab <schwab at suse dot de>, "Sanjiv Kumar Gupta, Noida" <sanjivg at noida dot hcltech dot com>, Peter Barada <pbarada at mail dot wm dot sps dot mot dot com>, aph at cambridge dot redhat dot com, dhananjayd at kpit dot com, gnuh8 at gnuh8 dot org dot uk, gcc at gcc dot gnu dot org
- Date: 08 Aug 2002 10:55:50 -0400
- Subject: Re: negation of float on H8300
- References: <firstname.lastname@example.org>
>Not if it's a signalling NaN. If the chip only supports QNaNs, then
>you might be able to get away with it.
Flipping the sign bit is correct even for a signalling NaN. See item 2 in
the Appendix of IEEE Std 754-1985 (Binary Floating-Point Arithmetic).
See also item 2 in the Appendix of IEEE Std 854-1987 (Radix-Independent