gcc reload problem

[thomas joseph <thomascanny at yahoo dot co dot nz>]

Hi All,
 I am trying to port gcc to a new architecture.
 In this architecture double values go only
 in dp registers (regno 64 to 128) and all other
 values go only in GP registers (regno 0 to 63).

  And I have defined my HARD_REGNO_MODE_OK and
   PREFERRED_RELOAD_CLASS macros appropriately.
   (they allow DFmode values only in DP regs
      and all others in GP regs.)

 Building the compiler with libgcc2 goes fine. But
when
 I tried to compile glibc I encountered a problem.
 I traced down the with this c program.

test.c
-------

union ieee754_double
  {
    double d;
    struct
      {
	unsigned int negative:1;
	unsigned int exponent:11;
	 
	unsigned int mantissa0:20;
	unsigned int mantissa1:32;
      } ieee;
  };
 
__const  double
 __copysign (  double x ,  double y ) 
{
  union ieee754_double ux, uy;
  ux.d = x;
  uy.d = y;
   
/* problem is with this line. */
   ux.ieee.negative = uy.ieee.negative;

  return ux.d;
}

when I compile this program 
  /home/anb/exe/bin/gcc -S test.c works fine.

But when I compile the program  with -O2 the reload
fails. Saying

test.c: In function `__copysign':
test.c:28: Unable to find a register to spill.

(insn 13 11 14 (set (subreg:DF (reg/v:DI 4 %r4) 0)
        (reg/v:DF 64 %f0)) 89 {*movdf} (insn_list 4
(nil))
    (expr_list:REG_DEAD (reg/v:DF 64 %f0)
        (nil)))


I think that the problem is gcc  trying
 to move a value between DFmode and DImode registers
 which I am not allowing.

Coould you please tell me how I could overcome this
problem. I am looking at the mips port which is close
to my architecture. 

Could you knidly guide on what parts of the compiler
I should look for this problem.

 Thanks and Regards,

 Thomas joseph




















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