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RE: Register Pressure in Instruction Level Parallelism (fwd)
- From: Michael Matz <matzmich at cs dot tu-berlin dot de>
- To: Duraid Madina <duraid at fl dot net dot au>
- Cc: "'Daniel Jacobowitz'" <drow at mvista dot com>, <gcc at gcc dot gnu dot org>
- Date: Sun, 14 Jul 2002 19:29:15 +0200 (MET DST)
- Subject: RE: Register Pressure in Instruction Level Parallelism (fwd)
Hi,
On Sun, 14 Jul 2002, Duraid Madina wrote:
> Seriously, what are you trying to say here? That GCC is (or should be) a
> compiler that's fast, *particularly* for large or pathological programs?
> I hope not. I think that donning the "GCC shall remain in P-time"
> blinkers is rather inappropriate when it comes to instruction
> scheduling.
We (or at least I) were talking about register allocation. So you are
fine with gcc needing a day to compile e.g. combine.c? Ok then, but that
would be -fmadina-squeeze-last-bit-of-performance-how-long-it-takes. Just
read some papers about register allocation with IP solving. If they give
time measures at all, one usually laughs at them (from a production
compiler viewpoint). Requiring an hour to allocate one function is
inacceptable. That's not to say, it can't be made faster. But without
losing the advantages over other heuristics it's not easy.
Ciao,
Michael.