unable to satisfy constraint

[umar janjua <umarj at enabtech dot com>]

I am porting gcc to a new target processor where there are 16 address
registers and 16 data registers. There are certain constraints with respect
to data/memory movements
Only the data registers can be directly written to memory. i.e if i have a
data reg "r1" and address reg "a1", and  i want to store the value of a1
into memory , it is only possible if i move the address reg first into the
data register and then from data register into memory.
Similarly, only data registers can read value from memory directly, not
address registers.

I think this is taken care by gcc through reloading during global register
allocation pass. I have specified following patterns in the .md file with
respect to loading the value into registers

(define_insn "*loadqi_insn"
  [(set (match_operand:QI 0 "register_operand" "=d")
	(match_operand:QI 1 "memory_operand"   "m"))]
  ""
  "%0.i=%1;"
[(set_attr "predicable" "yes")
 (set_attr "type" "load")])

And with respect to storing 

(define_insn "*storeqi_insn"
  [(set (match_operand:QI 0 "memory_operand" "=m")
	(match_operand:QI 1 "register_operand"   "d"))]
  ""
  "%0=%1.i;"
[(set_attr "predicable" "yes")
 (set_attr "type" "store")])


The reload patterns are as

(define_expand "reload_inqi"
 [(parallel [(match_operand 0 "register_operand" "")
	      (match_operand 1 "general_operand" "")
	      (match_operand 2 "register_operand" "=&d")])]
 ""
  "")

(define_insn "reload_inqi_insn"
 [(parallel [(match_operand 0 "register_operand" "=d")
	      (match_operand 1 "general_operand" "")
	      (match_operand 2 "register_operand" "")])]
 ""
 " i m used")

(define_expand "reload_outqi"
  [(parallel [(match_operand 0 "general_operand" "")
	      (match_operand 1 "register_operand" "")
	      (match_operand 2 "register_operand" "=&d")] )]
  ""
  "")

(define_insn "reload_outqi_insn"
  [(parallel [(match_operand 0 "general_operand" "=m")
	      (match_operand 1 "register_operand" "a")
	      (match_operand 2 "register_operand" "=&d")] )]
  "" 
  " hi its used ")


And the macro is 

#define SECONDARY_RELOAD_CLASS(CLASS,MODE,X)		\
     (( (GET_CODE (X) == SYMBOL_REF) && (CLASS==DATA_REGS)) ? ADDRESS_REGS :
\
     (( (GET_CODE (X) == MEM) && (CLASS==ADDRESS_REGS)) ? DATA_REGS:
NO_REGS) )	


However, I am getting the following error as below.


================================
 D4i40_17_fast
D4i4.c: In function `D4i40_17_fast':
D4i4.c:503: insn does not satisfy its constraints:
(insn 2951 81 2954 (set (reg:QI 24 a8)
        (mem:QI (plus:QI (reg/f:QI 26 a10)
                (const_int 94 [0x5e])) [0 i S1 A16])) 6 {*loadqi_insn} (nil)
    (nil))

D4i4.c:503: Internal compiler error in reload_cse_simplify_operands, at
reload1.
c:8368
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://www.gnu.org/software/gcc/bugs.html> for instructions.
=================================

Totally clueless at the moment...need ur help..

regards,
umar