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Re: Bug on PA-RISC
- From: law at redhat dot com
- To: "John David Anglin" <dave at hiauly1 dot hia dot nrc dot ca>
- Cc: gcc at gcc dot gnu dot org, gcc-patches at gcc dot gnu dot org
- Date: Tue, 04 Jun 2002 17:16:10 -0600
- Subject: Re: Bug on PA-RISC
- Reply-to: law at redhat dot com
In message <200206042232.g54MWhtd016764@hiauly1.hia.nrc.ca>, "John David Anglin
" writes:
> > > I think that we would get better floating point code if it were not
> > > necessary to disparage floating point register copies.
> > We only disparage them in integer modes -- which IMHO is the right thing
> > to do. We only want to use FP registers for integer thingies when doing
> > xmpyu.
>
> There appears to be one for float thingies at line 2947 (DFmode,
> TARGET_64BIT).
Line 2947 of pa.md in the mainline sources is a comment.
Line 2947 of pa.md on the 3.1 branch looks like:
(define_insn ""
[(set (match_operand:DF 0 "reg_or_nonsymb_mem_operand"
"=r,r,r,r,r,Q,*q,!f,f,*TR")
(match_operand:DF 1 "move_operand"
"r,J,N,K,RQ,rM,rM,!fM,*RT,f"))]
"(register_operand (operands[0], DFmode)
Is this the pattern you're referring to? Yes, that looks awful strange
with the !fM -> !f alternative. I can't think of any reason why that's in
there other than it might have come from the 64bit movdi pattern and I
simply forgot to remove the unwanted '!'.
Jeff