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Re: mainline performance regression (observered on SPARC)
Andrey Petrov <petrov@netbsd.org> writes:
> On Fri, May 24, 2002 at 11:36:48AM -0700, Dan Nicolaescu wrote:
> >
> > Any idea what is the cause of this?
> >
> > The code is kind of silly, it moves stuff around between the integer
> > and fp registers, probably an artifact of the SPARC calling
> > conventions (passing doubles in the integer registers). But shouldn't
> > inlining get rid of this?
> >
>
> This made me re-read sparc v9 abi, and it says that floating-point
> arguments and return values are passed in fpu registers. But some
> of the fpu registers are volatile across functions calls and some
> are not. I guess that you see saving/restoring of non-volatile fpu
> regs.
-mcpu=ultrasparc is v8plus not v9