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Re: [new-regalloc-branch] (s390): Failure in reload_cse_simplify_operands
- From: "Hartmut Penner" <HPENNER at de dot ibm dot com>
- To: David Edelsohn <dje at watson dot ibm dot com>
- Cc: gcc at gcc dot gnu dot org
- Date: Fri, 10 May 2002 10:01:26 +0200
- Subject: Re: [new-regalloc-branch] (s390): Failure in reload_cse_simplify_operands
> BTW, I am able to bootstrap the new-regalloc branch. Allowing
>SImode in FPRs without instructions that can move between them always has
>been problematical for GCC. PowerPC has a similar limitation and does not
>allow SImode in FPRs for exactly this type of reason.
We had problems with GCC, by not allowing SImode in FPRs and SFmode in
I don't remember excatly what went wrong, but I think it had something to
with unions (int, float). I will take a look at you PowerPC and see how you
> Also, I see about a 5% performance boost on benchmarks and
>less register spilling on some real-world testcases which produce
>horrendous code with the current register allocator.
We hope also to see that, looking at current register allocation isn't to
Mit freundlichem Gruß / Best regards,