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optimize in GCC and ADS


Title: optimize in GCC and ADS

 I have compiled MP3 in ADSv1.1, and get good performance, but when I compiled it with GCC(2.95 -O2), and get bad performance. compared running code which generated by GCC and ADSv1.1, ADSv1.1 do better than GCC, are there any plan to improve optimizing for ARM target?

Brs
James


here is my test code:

int is_str_empty( char *p )
{
        if ( *p )
                return 1;
        else
                return 0;
}

void arm_loop_test(void)
{
        int i = 1000000;
        while(i--);    
}

====================================================
generated by GCC -O2 optimize
====================================================
000000ac <is_str_empty>:
  ac:   e1a0c00d        mov     r12, sp
  b0:   e92dd800        stmdb   sp!, {r11, r12, lr, pc}
  b4:   e5d00000        ldrb    r0, [r0]
  b8:   e24cb004        sub     r11, r12, #4    ; 0x4
  bc:   e2500000        subs    r0, r0, #0      ; 0x0
  c0:   13a00001        movne   r0, #1  ; 0x1
  c4:   e91ba800        ldmdb   r11, {r11, sp, pc}

000000c8 <arm_loop_test>:
  c8:   e1a0c00d        mov     r12, sp
  cc:   e92dd800        stmdb   sp!, {r11, r12, lr, pc}
  d0:   e24cb004        sub     r11, r12, #4    ; 0x4
  d4:   e3a0393d        mov     r3, #999424     ; 0xf4000
  d8:   e2833d09        add     r3, r3, #576    ; 0x240
  dc:   e2433001        sub     r3, r3, #1      ; 0x1
  e0:   e3730001        cmn     r3, #1  ; 0x1
  e4:   1a000035        bne     1c0 <arm_loop_test+0xf8>
  e8:   e91ba800        ldmdb   r11, {r11, sp, pc}

====================================================
generated by ADSv1.1
====================================================

00000080 <is_str_empty>:
  80:   e5d00000        ldrb    r0, [r0]
  84:   e3500000        cmp     r0, #0  ; 0x0
  88:   0a000001        beq     94 <is_str_empty+0x14>
  8c:   e3a00001        mov     r0, #1  ; 0x1
  90:   e1a0f00e        mov     pc, lr
  94:   e3a00000        mov     r0, #0  ; 0x0
  98:   eafffffc        b       90 <is_str_empty+0x10>

0000009c <arm_loop_test>:
  9c:   e51f0028        ldr     r0, [pc, #ffffffd8]     ; 7c <$d>
  a0:   e2500001        subs    r0, r0, #1      ; 0x1
  a4:   2afffffd        bcs     a0 <arm_loop_test+0x4>
  a8:   e1a0f00e        mov     pc, lr


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