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RTL generation patterns
- From: Danish Samad <danishsamad at yahoo dot com>
- To: gcc at gcc dot gnu dot org, durdana at enabtech dot com, syed_rauf_ul_hassan at hotmail dot com
- Date: Wed, 27 Feb 2002 06:02:25 -0800 (PST)
- Subject: RTL generation patterns
hello
The following line of code
l=1;
when cross compiled with the arm cross compiler
produces the following load store rtl instructions:
(insn 10 7 11 (set (reg:SI 32)
(const_int 1 [0x1])) -1 (nil)
(expr_list:REG_EQUAL (const_int 1 [0x1])
(nil)))
(insn 11 10 14 (set (mem/f:SI (plus:SI (reg:SI 28)
(const_int -16 [0xfffffff0])) 0)
(reg:SI 32)) -1 (nil)
(nil))
These instructions are generated form the following
define expand:
define_expand "movsi"
[(set (match_operand:SI 0 "general_operand" "")
(match_operand:SI 1 "general_operand" ""))]
.....
I fail to understand how the second rtl
(store)instrucion is generated from this pattern. how
does
(match_operand:SI 0 "general_operand" "") produce
(mem/f:SI (plus:SI (reg:SI 28)
(const_int -16 [0xfffffff0])) 0)
shouldnt it only produce a single rtl instruction like
only a mem? please comment
regards,
danish
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