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RE: GCC 3.0.3 Prelease problem on --target=m68k-elf
- From: Bernard Dautrevaux <Dautrevaux at microprocess dot com>
- To: 'Peter Barada' <pbarada at mail dot wm dot sps dot mot dot com>, gcc at gcc dot gnu dot org
- Date: Fri, 14 Dec 2001 17:50:48 +0100
- Subject: RE: GCC 3.0.3 Prelease problem on --target=m68k-elf
> -----Original Message-----
> From: Peter Barada [mailto:pbarada@mail.wm.sps.mot.com]
> Sent: Friday, December 14, 2001 2:10 AM
> To: gcc@gcc.gnu.org
> Subject: Re: GCC 3.0.3 Prelease problem on --target=m68k-elf
>
>
>
> gcc-3.0.3-20011213 builds with the following config.status:
> #!/bin/sh
> # This file was generated automatically by configure. Do not edit.
> # This directory was configured as follows:
> /home/pbarada/work/cvs-wavemark/cross-linux-tools/gcc-3.0.3-20
> 011213/configure
> --with-gcc-version-trigger=/home/pbarada/work/cvs-wavemark/cro
> ss-linux-tools/gcc-3.0.3-20011213/gcc/version.c
> --host=i686-pc-linux-gnu --target=m68k-elf
> --prefix=/tmp/crap5 --enable-languages=c
> --with-local-prefix=/tmp/crap5/m68k-elf --without-headers
> --with-newlib --disable-shared --norecursion
> #
>
> Unfortunately it doesn't produce correct code for -m5200 due to the
> "r" constraint in the following pattern in gcc/config/m68k/m68k.md:
>
> ;; Jump to variable address from dispatch table of relative addresses.
> (define_insn ""
> [(set (pc)
> (plus:SI (pc)
> (sign_extend:SI (match_operand:HI 0
> "register_operand" "r"))))
> (use (label_ref (match_operand 1 "" "")))]
> ""
>
> On Coldfire the ext.l instruction can only extend data registers, not
> address registers, so either the constraint needs to be changed to
> "d", or another pettern needs to be created for TARGET_5200 with a "d"
> constraint, and this needs a condition of !TARGET_5200.
>
I'm not sure this has anything to do with the 5200. On ALL 68k processors
"ext" instructions are only usable on data registers and that's
understandable: loading a word (16bits) in an address register caus
*automatic* sign extension to 32 bits. There is no way to load a 16bits
unsigned constant in an address register.
The assembler generation part of the pattern you list here was, at least on
2.93.3:
if (TARGET_5200)
return \"ext%.l %0\;jmp 6(%%pc,%0.l)\";
else
return \"jmp 6(%%pc,%0.w)\";
It should in fact be changed to:
if (TARGET_5200 && !ADDRESS_REG_P (operands[0]))
return \"ext%.l %0\;jmp 6(%%pc,%0.l)\";
else
return \"jmp 6(%%pc,%0.w)\";
or even
if (ADDRESS_REG_P (operands[0]))
return \"jmp 6(%%pc,%0.l)\";
else if (TARGET_5200)
return \"ext%.l %0\;jmp 6(%%pc,%0.l)\";
else
return \"jmp 6(%%pc,%0.w)\";
I think this was always present in m68k.md, but was masked by the fact that
this is used only in a very limited context where pre 3.0 gcc version always
loaded the table offset in a data register...
HTH
Bernard
--------------------------------------------
Bernard Dautrevaux
Microprocess Ingenierie
97 bis, rue de Colombes
92400 COURBEVOIE
FRANCE
Tel: +33 (0) 1 47 68 80 80
Fax: +33 (0) 1 47 88 97 85
e-mail: dautrevaux@microprocess.com
b.dautrevaux@usa.net
--------------------------------------------