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Re: Reload bug on Sparc
- To: kenner at vlsi1 dot ultra dot nyu dot edu (Richard Kenner)
- Subject: Re: Reload bug on Sparc
- From: Joern Rennecke <amylaar at onetel dot net dot uk>
- Date: Sun, 11 Nov 2001 00:18:01 +0000 (GMT)
- Cc: gcc at gcc dot gnu dot org
Richard Kenner wrote:
>
> I have the following in a .greg file:
>
> Reloads for insn # 1179
> Reload 0: reload_in (SI) = (plus:SI (reg/f:SI 30 %fp)
> (const_int -16544 [0xffffffffffffbf60]))
> GENERAL_REGS, RELOAD_FOR_OUTPUT_ADDRESS (opnum = 0), can't combine
> reload_in_reg: (plus:SI (reg/f:SI 30 %fp)
> (const_int -16544 [0xffffffffffffbf60]))
> reload_reg_rtx: (reg:SI 10 %o2)
> Reload 1: GENERAL_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
> reload_out_reg: (reg:SI 198)
> Reload 2: reload_in (SI) = (plus:SI (reg/f:SI 30 %fp)
> (const_int -16 [0xfffffffffffffff0]))
> reload_out (SI) = (mem:SI (plus:SI (reg/f:SI 30 %fp)
> (const_int -16544 [0xffffffffffffbf60])) [179 S4 A32])
> GENERAL_REGS, RELOAD_OTHER (opnum = 1)
> reload_in_reg: (plus:SI (reg/f:SI 30 %fp)
> (const_int -16 [0xfffffffffffffff0]))
> reload_out_reg: (reg:SI 198)
> reload_reg_rtx: (reg:SI 11 %o3)
> Reload 3: reload_in (SI) = (const_int -16464 [0xffffffffffffbfb0])
> GENERAL_REGS, RELOAD_FOR_INPUT (opnum = 2), can't combine
> reload_in_reg: (reg:SI 142)
> reload_reg_rtx: (reg:SI 10 %o2)
>
> Note that it appears that reload 1 is combined into reload 2 and changed
> to RELOAD_OTHER.
>
> However, reload 0 is RELOAD_FOR_OUTPUT_ADDRESS, but that's wrong: it's really
> RELOAD_FOR_OTHER_ADDRESS. We're getting incorrect code from this.
RELOAD_FOR_OTHER_ADDRESS is actually for address reloads that feed the
input part of a RELOAD_OTHER reload. AFAICS reload 0 only feeds the
output part of reload 2. Outputting reload 0 at RELOAD_FOR_OUTPUT_ADDRESS
time should be early enough.
However, the operand number of reload 3 is 1, and as output reloads are
emitted in reverse order, the operand number of reload 0 would also have
to be bumped up to 1 in order to do the reload in time.