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Re: MODES_TIEABLE_P question

To: Stephen Clarke <Stephen dot Clarke at st dot com>
Subject: Re: MODES_TIEABLE_P question
From: Richard Henderson <rth at redhat dot com>
Date: Sat, 10 Nov 2001 09:39:52 -0800
Cc: gcc at gcc dot gnu dot org
References: <3BEB1502.3ED83EC2@st.com> <20011109164334.A8502@redhat.com> <3BEC8C62.D5E61D2F@st.com>

On Fri, Nov 09, 2001 at 06:09:38PM -0800, Stephen Clarke wrote:
> But I'm still not totally happy, because I need to hold DImode values
> in even/odd pairs of fp registers, so then
>   HARD_REGNO_MODE_OK (fr0, SImode) is 1
>   HARD_REGNO_MODE_OK (fr0, DImode) is 1
>   HARD_REGNO_MODE_OK (fr1, SImode) is 1
> but
>   HARD_REGNO_MODE_OK (fr1, DImode) is 0
> 
> which would appear to cause a problem if SImode and DImode are
> tieable?

I don't recall.  Look at the sparc port, which does this too.


r~

References:
- MODES_TIEABLE_P question
  - From: Stephen Clarke
- Re: MODES_TIEABLE_P question
  - From: Richard Henderson
- Re: MODES_TIEABLE_P question
  - From: Stephen Clarke

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