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Re: powerpc & unaligned block moves with fp registers
- To: kenner at vlsi1 dot ultra dot nyu dot edu
- Subject: Re: powerpc & unaligned block moves with fp registers
- From: degger at fhm dot edu
- Date: Sat, 10 Nov 2001 14:48:12 +0100 (CET)
- Cc: gcc at gcc dot gnu dot org
- Reply-To: degger at fhm dot edu
On 8 Nov, Richard Kenner wrote:
> Perhaps, but I think the key issue is the one I raised in my last
> message: how slow is "slow"?
Slow in the case of misaligned accesses depends on the system; if the
hardware handles it by splitting up the accesses then it's likely to be
in the range of a few dotzend up to a few hundred cycles. If the acesses
emerge into the OS because the hardware cannot handle it then
the overhead is more likely to be in the range from a few hundred up to
several thousand cycles. It's really hard to give accurate numbers here
since it depends very much on the CPU and in the latter case also on the
OS.
All one can say is: Avoid it on any price.
--
Servus,
Daniel