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Re: prefetch revisited
- To: Janis Johnson <janis187 at us dot ibm dot com>
- Subject: Re: prefetch revisited
- From: Janis Johnson <janis187 at us dot ibm dot com>
- Date: Mon, 5 Nov 2001 14:23:49 -0800
- Cc: gcc at gcc dot gnu dot org
- References: <20011030085716.A1531@us.ibm.com>
I've been exploring data prefetch instructions on several GCC targets.
Summaries for each architecture, a description of common attributes, and
some general wisdom about compiler use of such instructions is now in an
html document that continues to grow.
Besides being useful to me as I come up with a proposal for a prefetch
RTL pattern and, I hope, to Honza as he works on prefetch optimizations
in the near furture, this information would probably be useful to people
adding prefetch optimizations in the future. If so, I can put it into
whatever format it needs for its final location. In the meantime,
though, is there a temporary place I can put it? I'd rather not send a
28K html file to the mailing list; that can come when it's part of a
real patch.
Janis
P.S. Here's the gist of what I've found out about data prefetch support
on GCC targets (this is much prettier in html).
================================================================================
Target |Prefetch |Read |Locality |Other features
|amount |write |hints |to consider
================================================================================
3DNow! |cache line; |yes | |
|>= 32 bytes | | |
--------------------------------------------------------------------------------
Alpha |cache line |yes |separate insn for |
21264 | | |transient load |
--------------------------------------------------------------------------------
AltiVec|specified |yes |temporal locality |prefetch instruction must
|unit size, | | |specify one of four touch
|cnt, stride | | |streams
--------------------------------------------------------------------------------
IA-32 |cache line; |no |temporal locality |
SSE |>= 32 bytes | |and cache level |
--------------------------------------------------------------------------------
Itanium|cache line; |yes |temporal locality |base update form with implicit
|>= 32 bytes | |and cache level |prefetch; cache control hints
| | | |on load and store instructions
--------------------------------------------------------------------------------
MIPS |cache line |yes |temporal locality |
| | |(streamed or |
| | |retained) |
--------------------------------------------------------------------------------
MMIX |specified |yes | |
|# byte | | |
--------------------------------------------------------------------------------
PA-RISC|cache line |yes |spatial locality |cache control hints on load
| | | |and store instructions;
| | | |pre/post increment (base
| | | |update) forms of some load
| | | |and store instructions
--------------------------------------------------------------------------------
PowerPC|cache line |yes | |
--------------------------------------------------------------------------------
SH |cache line; |no | |
|>= 16 bytes | | |
--------------------------------------------------------------------------------
SPARC |cache line |yes |maybe; what does |
| | |"one or several" |
| | |mean? |
--------------------------------------------------------------------------------