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Re: Inefficient bitfield code generation
- To: degger at fhm dot edu
- Subject: Re: Inefficient bitfield code generation
- From: Zoltan Hidvegi <hzoli at austin dot ibm dot com>
- Date: Sat, 27 Oct 2001 12:13:44 -0500 (CDT)
- Cc: gcc at gcc dot gnu dot org
degger@fhm.edu wrote:
> Actually the rs6000 port of gcc is really bad when it
> comes to using the blazingly powerful rotate and mask
> instructions of the powerpc.
Yeah, that would be nice, but I am really more worried about the extra
load and stores in the examples I showed. The load will hang the CPU
on cache miss, and there are 2 stores, one word, one byte to the same
address than can also be pretty bad, and that happens on both PowerPC
and x86. Actually, I am really impressed that gcc can optimize out
the load in
*p = (*p & 255) | (a << 8);
*p = (*p & ~255) | (b & 255);
That's better than the IBM compilers. Too bad that it cannot do that
for bitfields.
Zoli