Re: df.c and partial writes/REG_EQUAL notes

[law at redhat dot com]

  In message <Pine.GSO.4.33.0110242215060.17229-100000@platon>you write:
  > Hi,
  > 
  > On Wed, 24 Oct 2001 law@redhat.com wrote:
  > 
  > > Right.  Review the movxx section in the Machine Descriptions part of the
  > > manual.  Quoting:
  > >
  > > @cindex @code{mov@var{m}} instruction pattern
  > > @item @samp{mov@var{m}}
  > > Here @var{m} stands for a two-letter machine mode name, in lower case.
  > > This instruction pattern moves data with that machine mode from operand
  > > 1 to operand 0.  For example, @samp{movsi} moves full-word data.
  > >
  > > If operand 0 is a @code{subreg} with mode @var{m} of a register whose
  > > own mode is wider than @var{m}, the effect of this instruction is
  > > to store the specified value in the part of the register that corresponds
  > > to mode @var{m}.  The effect on the rest of the register is undefined.
  > >
  > > Based on that I believe there should be no dependency since insn #2
  > > leaves the rest of the DI register undefined.
  > 
  > No, that's exactly the problem I was asking some months before about this
  > documentation.  Only the _word_ containing the subreg is touched by such a
  > move, i.e. if the subreg describes a complete word, it leaves no bits
  > undefined.  Depending on the machine a (set (subreg:SI (reg:DI x) 0))
  > clobbers the complete (reg:DI x) (if it only takes one hardreg), or only
  > the lower half.
Several folks have pointed out the documentation problem.  Too bad we
didn't fix the documentation the first time this came up :-)

Anyway, I believe this patch should make the documentation clearer.

	* doc/md.texi (movMM): Clarify semantics of storing into a 
	non-paradoxical SUBREG.

Index: md.texi
===================================================================
RCS file: /cvs/gcc/egcs/gcc/doc/md.texi,v
retrieving revision 1.25
diff -c -3 -p -r1.25 md.texi
*** md.texi	2001/10/11 07:07:30	1.25
--- md.texi	2001/10/25 18:17:46
*************** This instruction pattern moves data with
*** 2024,2030 ****
  If operand 0 is a @code{subreg} with mode @var{m} of a register whose
  own mode is wider than @var{m}, the effect of this instruction is
  to store the specified value in the part of the register that corresponds
! to mode @var{m}.  The effect on the rest of the register is undefined.
  
  This class of patterns is special in several ways.  First of all, each
  of these names up to and including full word size @emph{must} be defined,
--- 2024,2032 ----
  If operand 0 is a @code{subreg} with mode @var{m} of a register whose
  own mode is wider than @var{m}, the effect of this instruction is
  to store the specified value in the part of the register that corresponds
! to mode @var{m}.  Bits outside of @var{m}, but which are within the
! same target word as the @code{subreg} are undefined.  Bits which are
! outside the target word are left unchanged.
  
  This class of patterns is special in several ways.  First of all, each
  of these names up to and including full word size @emph{must} be defined,