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Re: 3.0 vs 3.0.1 on oopack's Max
- To: Paolo Carlini <pcarlini at unitus dot it>
- Subject: Re: 3.0 vs 3.0.1 on oopack's Max
- From: Jan Hubicka <jh at suse dot cz>
- Date: Sat, 8 Sep 2001 18:03:22 +0200
- Cc: gcc at gcc dot gnu dot org, jh at suse dot cz, jbuck at synopsys dot com, rth at cygnus dot com
- References: <3B98CE9D.AE04A5B7@unitus.it>
> I hope that some of the gcc developers (perhaps Jan Hubicka?) may take
> care of this disappointing behavior!
:) OK, it looks the problem is in the setcc code that causes partial
Otherwise the 3.1 code looks good to me and also perofrms quite happily
on Athlon that is free of the issue.
The problem is relativly old - you have QImode register as result of setcc.
The AND following it gets combined to have (SUBREG:SI (QIreg)) argument.
In most of cases GCC gets around this by avoiding 8bit computations at all,
but setcc must be 8bit. Richard has recently changes way setcc is expanded,
so it is optimized better. One of better optimizations is this one and
sadly it is not very lucky...
I am not quite sure how to avoid gcc from doing this optimization.
I will take a look overnight.
> Paolo Carlini.