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Re: mul + div with 64 bit signed ints on IA32
- To: jh at suse dot cz, pfk at fuchs dot offl dot uni-jena dot de
- Subject: Re: mul + div with 64 bit signed ints on IA32
- From: dewar at gnat dot com
- Date: Tue, 4 Sep 2001 16:50:28 -0400 (EDT)
- Cc: gcc at gcc dot gnu dot org
<<Another floating point problem are the rounding bits of the FPU.
It should be forced that these two bits are always '11' (round to zero).
This would decrease code size and speed up significantly the code.
Surely you jest?
Round to zero (otherwise known as truncation) has much nastier properties
than round to nearest. Almost always round to nearest should be the