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Re: stepanov on sparc; sparc backend scheduling issues
- To: Joe Buck <jbuck at racerx dot synopsys dot com>
- Subject: Re: stepanov on sparc; sparc backend scheduling issues
- From: Daniel Berlin <dan at cgsoftware dot com>
- Date: 28 May 2001 11:47:02 -0400
- Cc: dje at watson dot ibm dot com (David Edelsohn), jbuck at synopsys dot COM (Joe Buck), mark at codesourcery dot com (Mark Mitchell), jfm2 at club-internet dot fr, gcc at gcc dot gnu dot org
- References: <200105280244.TAA19119@racerx.synopsys.com>
Joe Buck <jbuck@racerx.synopsys.com> writes:
> > Sigh. On PowerPC, the first loops look like:
>
> [ a loop with one memory read ]
>
> > but later loops look like:
>
> [ a loop with two reads and a write ]
>
> > repeatedly moving the address in and out of a stack slot instead of
> > keeping the value in a register. This is not good.
>
> Jason Merrill's ADDRESSOF optimization is supposed to take care of this;
> the question is why it is not working. That is, why on the PowerPC and
> x86 do we get loops that needlessly commit the iterator to memory.
>
Am I correct in thinking ADDRESSOF == Scalar replacement of aggregates?
It seems to do much the same thing if it's not.
At least, resultwise.
--
"My friend Winnie is a procrastinator. He didn't get his
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"-Steven Wright