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x86_64 merger part 14 - use ANY_QI_REG_P where needed
- To: rth at cygnus dot com, patches at x86-64 dot org, gcc at gcc dot gnu dot org
- Subject: x86_64 merger part 14 - use ANY_QI_REG_P where needed
- From: Jan Hubicka <jh at suse dot cz>
- Date: Mon, 12 Mar 2001 18:04:33 +0100
Hi
This patch kills incorrect uses of QI_REG_P.
Mon Mar 12 17:59:49 CET 2001 Jan Hubicka <jh@suse.cz>
* i386.md (QImode move/add/shift patterns): Use ANY_QI_REG_P
instead of QI_REG_P or using get_attr_mode.
*** i386.md Mon Mar 12 16:02:18 2001
--- /home/hubicka/x86-64/gcc/gcc/config/i386/i386.md Fri Mar 9 18:06:16 2001
***************
*** 1911,1917 ****
switch (get_attr_type (insn))
{
case TYPE_IMOVX:
! if (!QI_REG_P (operands[1]) && GET_CODE (operands[1]) != MEM)
abort ();
return \"movz{bl|x}\\t{%1, %k0|%k0, %1}\";
default:
--- 4550,4556 ----
switch (get_attr_type (insn))
{
case TYPE_IMOVX:
! if (!ANY_QI_REG_P (operands[1]) && GET_CODE (operands[1]) != MEM)
abort ();
return \"movz{bl|x}\\t{%1, %k0|%k0, %1}\";
default:
***************
*** 3077,3083 ****
(clobber (reg:CC 17))]
"reload_completed
&& (!TARGET_ZERO_EXTEND_WITH_AND || optimize_size)
! && (!REG_P (operands[1]) || QI_REG_P (operands[1]))"
[(set (match_operand:HI 0 "register_operand" "")
(zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "")))])
--- 5902,5908 ----
(clobber (reg:CC 17))]
"reload_completed
&& (!TARGET_ZERO_EXTEND_WITH_AND || optimize_size)
! && (!REG_P (operands[1]) || ANY_QI_REG_P (operands[1]))"
[(set (match_operand:HI 0 "register_operand" "")
(zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "")))])
***************
*** 3088,3094 ****
(zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "")))
(clobber (reg:CC 17))]
"reload_completed
! && QI_REG_P (operands[0])
&& (TARGET_ZERO_EXTEND_WITH_AND && !optimize_size)
&& !reg_overlap_mentioned_p (operands[0], operands[1])"
[(set (match_dup 0) (const_int 0))
--- 5913,5919 ----
(zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "")))
(clobber (reg:CC 17))]
"reload_completed
! && ANY_QI_REG_P (operands[0])
&& (TARGET_ZERO_EXTEND_WITH_AND && !optimize_size)
&& !reg_overlap_mentioned_p (operands[0], operands[1])"
[(set (match_dup 0) (const_int 0))
***************
*** 3147,3153 ****
(clobber (reg:CC 17))]
"reload_completed
&& (!TARGET_ZERO_EXTEND_WITH_AND || optimize_size)
! && (!REG_P (operands[1]) || QI_REG_P (operands[1]))"
[(set (match_dup 0)
(zero_extend:SI (match_dup 1)))])
--- 5972,5978 ----
(clobber (reg:CC 17))]
"reload_completed
&& (!TARGET_ZERO_EXTEND_WITH_AND || optimize_size)
! && (!REG_P (operands[1]) || ANY_QI_REG_P (operands[1]))"
[(set (match_dup 0)
(zero_extend:SI (match_dup 1)))])
***************
*** 3158,3165 ****
(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "")))
(clobber (reg:CC 17))]
"reload_completed
! && QI_REG_P (operands[0])
! && (QI_REG_P (operands[1]) || GET_CODE (operands[1]) == MEM)
&& (TARGET_ZERO_EXTEND_WITH_AND && !optimize_size)
&& !reg_overlap_mentioned_p (operands[0], operands[1])"
[(set (match_dup 0) (const_int 0))
--- 5983,5990 ----
(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "")))
(clobber (reg:CC 17))]
"reload_completed
! && ANY_QI_REG_P (operands[0])
! && (ANY_QI_REG_P (operands[1]) || GET_CODE (operands[1]) == MEM)
&& (TARGET_ZERO_EXTEND_WITH_AND && !optimize_size)
&& !reg_overlap_mentioned_p (operands[0], operands[1])"
[(set (match_dup 0) (const_int 0))
***************
*** 8342,8348 ****
case TYPE_ALU:
if (operands[2] != const1_rtx)
abort ();
! if (NON_QI_REG_P (operands[1]))
return \"add{l}\\t{%k0, %k0|%k0, %k0}\";
else
return \"add{b}\\t{%0, %0|%0, %0}\";
--- 11272,11278 ----
case TYPE_ALU:
if (operands[2] != const1_rtx)
abort ();
! if (REG_P (operands[1]) && !ANY_QI_REG_P (operands[1]))
return \"add{l}\\t{%k0, %k0|%k0, %k0}\";
else
return \"add{b}\\t{%0, %0|%0, %0}\";
***************
*** 8399,8405 ****
case TYPE_ALU:
if (operands[2] != const1_rtx)
abort ();
! if (NON_QI_REG_P (operands[1]))
return \"add{l}\\t{%k0, %k0|%k0, %k0}\";
else
return \"add{b}\\t{%0, %0|%0, %0}\";
--- 11329,11335 ----
case TYPE_ALU:
if (operands[2] != const1_rtx)
abort ();
! if (REG_P (operands[1]) && !ANY_QI_REG_P (operands[1]))
return \"add{l}\\t{%k0, %k0|%k0, %k0}\";
else
return \"add{b}\\t{%0, %0|%0, %0}\";
***************
*** 8407,8413 ****
default:
if (REG_P (operands[2]))
{
! if (NON_QI_REG_P (operands[1]))
return \"sal{l}\\t{%b2, %k0|%k0, %b2}\";
else
return \"sal{b}\\t{%b2, %0|%0, %b2}\";
--- 11337,11343 ----
default:
if (REG_P (operands[2]))
{
! if (get_attr_mode (insn) == MODE_SI)
return \"sal{l}\\t{%b2, %k0|%k0, %b2}\";
else
return \"sal{b}\\t{%b2, %0|%0, %b2}\";
***************
*** 8416,8429 ****
&& INTVAL (operands[2]) == 1
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO))
{
! if (NON_QI_REG_P (operands[1]))
return \"sal{l}\\t%0\";
else
return \"sal{b}\\t%0\";
}
else
{
! if (NON_QI_REG_P (operands[1]))
return \"sal{l}\\t{%2, %k0|%k0, %2}\";
else
return \"sal{b}\\t{%2, %0|%0, %2}\";
--- 11346,11359 ----
&& INTVAL (operands[2]) == 1
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO))
{
! if (get_attr_mode (insn) == MODE_SI)
return \"sal{l}\\t%0\";
else
return \"sal{b}\\t%0\";
}
else
{
! if (get_attr_mode (insn) == MODE_SI)
return \"sal{l}\\t{%2, %k0|%k0, %2}\";
else
return \"sal{b}\\t{%2, %0|%0, %2}\";