Re: Combine clue requested - missed ia32 optimization

[Joern Rennecke <amylaar at cygnus dot co dot uk>]

> I've traced this to a missed combination.  We have RTL like so:
> 
> (set (reg:QI 50)
>      (gtu:QI (reg:CC 17 flags)
>              (const_int 0 [0x0])))
> 
> (set (reg:QI 51)
>      (ltu:QI (reg:CC 17 flags)
>              (const_int 0 [0x0])))
> 
> (set (reg:CC 17 flags)
>      (compare:CC (reg:QI 50)
>                  (reg:QI 51)))

combine can handle only three instructions at a time.  I suppose you could
still handle this, by combining these three instructions into a no-op move.
However, ia32 is a SMALL_REGISTER_CLASSES target, so all kinds of weird
limitations on what can be combined apply.  There is probably one that
blocks this combination.  You'd have to hack it to detect the generation
of a no-op move as a special case.  You also must make sure that the
machine description allows the no-op move, and that combine can do
the substitution and simplification in the first place.
set a breakpoint on try_combine with a condition that i3->fld[0].rtint
matches the uid of the third insn, i3->fld[0].rtint matches that of the
second insn, and i1 is nonzero and matches the uid of the first insn.
Then look where the match is rejected.

If try_combine is not called at all for this combination, then maybe
some LOG_LINKS are missing.