Bitfields accesses (causing problems to some ARM hardware)

["Igor Shevlyakov" <igor at windriver dot com>]

Hi folks,

Our custormers meet a problem.

They have some ARM board and it's memory mapped IO ports could only be
accessed in 4-byte words.
And they have a structure with bitfields describing some control word on that
IO bus.
They want manage somehow to use fullword access instructions (LDR & STR in ARM
case) when reading/modifing specific bitfield in that structure.
Simplifying their problem I've got a small testcase:

typedef struct s
{
  volatile int f1:2,
      f2:6,
      f3:3,
      f4:5,
      f5:8,
      f6:7,
      f7:1;
} S;


int f(S *p)
{
    p->f5 = 0;
    p->f3 = 0;
}

With some previous releases of GCC they got STRB instructions for both cases.
Newer release we are going to ship them is better, it's only using STRB for
first store. I found why.

Now arm.md changed that way that patterns generated from within
store_bit_field(...) will always use fullword for bit oparations. But in the
first case store_bit_field is not called, because that field's boundary is
byte-aligned and when reach condition in get_inner_reference()

if (! DECL_BIT_FIELD (TREE_OPERAND (exp, 1)))
  mode = DECL_MODE (TREE_OPERAND (exp, 1));

DECL_BIT_FIELD is not working on that kind of fields. So we've got mode =
QImode after that instead of VOIDmode how it should be for bitfields (at least
function's comment claiming that), and "moveqi" pattern will be generated
later instead of using store_bit_field().

Changing DECL_BIT_FIELD to DECL_BIT_FIELD_TYPE will help to recognize that
case as bitfield access. But such my changes was declined by Kenner for reason
of decreasing performance.

Do you have any suggestion how it should be handled. Could we fixed it in that
way that we will consider "volatile" for example and generate code for that as
for real bit-field. Or maybe do you know how to change source to get desired
effect.

Thanks in advance
Igor Shevlyakov
Senior Compiler Engineer
Wind River Inc.