Enabling SSA for alpha?

[Brad Lucier <lucier at math dot purdue dot edu>]

The alpha 21264 has the following constraint on floating-point
ops in IEEE arithmetic: The destination register must not be
the same as either of the source registers.  Gcc's register
allocator does not deal well with this constraint, and generally
generates a lot of fmov's to satisfy it.  Since it is claimed
that the 21364 will use the 21264 CPU core, this problem will
not go away soon.

If gcc transformed floating-point code to SSA form, then
the register allocator should do a much better job of assigning
registers to pseudo-registers for floating-point code, since there
will be no overlap at all of source and destination pseudo-registers.

So, my question:  How (and where) do I enable the SSA transformation
in gcc to see if, in fact, it does improve the register allocation
significantly?

Brad Lucier