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Re: FWD: FLOATING-POINT CONSISTENCY, -FFLOAT-STORE, AND X86
- To: Brad Lucier <lucier at math dot purdue dot edu>
- Subject: Re: FWD: FLOATING-POINT CONSISTENCY, -FFLOAT-STORE, AND X86
- From: Marc Lehmann <pcg at goof dot com>
- Date: Thu, 17 Dec 1998 23:50:52 +0100
- Cc: egcs at cygnus dot com
- References: <199812171927.OAA03931@polya.math.purdue.edu>
On Thu, Dec 17, 1998 at 02:27:02PM -0500, Brad Lucier wrote:
> If that means spilling FP registers to 80 bit temporaries aligned to
> 128-bit (or 64bit) boundaries, then so be it.
Given that the speed penalty of this solution might be very small, except for
(?) degenerate cases, we should not accept or decline this solution unless
somebody states some hard data (read: benchmarks).
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