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Re: FWD: FLOATING-POINT CONSISTENCY, -FFLOAT-STORE, AND X86
- To: egcs at tantalophile dot demon dot co dot uk
- Subject: Re: FWD: FLOATING-POINT CONSISTENCY, -FFLOAT-STORE, AND X86
- From: Craig Burley <burley at gnu dot org>
- Date: Wed, 16 Dec 1998 12:38:09 -0500 (EST)
- Cc: ejr at CS dot Berkeley dot EDU, jbuck at synopsys dot com, hjstein at bfr dot co dot il, egcs at cygnus dot com
- Cc: burley at gnu dot org
>But given that you can just put the FPU into 64-bit precision mode
>anyway to get predictable arithmetic, I would like to see the option to
>use just 64-bit spills for those programs that do run the FPU in 64-bit
>precision mode.
I think my proposed -fchop-fp-spills option would provide this. It
seems important, fundamentally, to provide an option to get the current
behavior at the same time we introduce proper spilling of complete FP
registers, in any case.
tq vm, (burley)