This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: Painful problems with -fpic implementation on powerpc-sysv
- To: law at cygnus dot com, Richard Henderson <rth at cygnus dot com>
- Subject: Re: Painful problems with -fpic implementation on powerpc-sysv
- From: Richard Henderson <rth at cygnus dot com>
- Date: Wed, 26 Aug 1998 19:18:07 -0700
- Cc: David Edelsohn <dje at watson dot ibm dot com>, Geoff Keating <geoffk at ozemail dot com dot au>, egcs at cygnus dot com, Franz Sirl <Franz dot Sirl-kernel at lauterbach dot com>
- References: <19980826122503.D1747@dot.cygnus.com> <4896.904181397@hurl.cygnus.com>
- Reply-To: Richard Henderson <rth at cygnus dot com>
On Wed, Aug 26, 1998 at 07:29:57PM -0600, Jeffrey A Law wrote:
> Consider a target where it is impossible to synthesize the sequence
> at reload time.
Define "impossible to synthesize". Ugly, yes. I can also see
needing two or three reload regs. But it should be possible,
ignoring asms, and given that any one insn doesn't have more than
a couple inputs.
In any case, from what little I know about ppc, I wouldn't think
there is such a thing, at least for pic in the 32-bit sysv abi:
* Having the pic register somewhere is non-negotiable. You need
it for either reading the actual data or for reading the address
from constant memory. We ought to be able to emit this
two-insn sequence just about anywhere.
* From there, one can continue modifying the address in-place.
r~