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Re: multi-word operations
- To: Richard Henderson <rth at cygnus dot com>
- Subject: Re: multi-word operations
- From: David Edelsohn <dje at watson dot ibm dot com>
- Date: Fri, 14 Aug 1998 15:42:23 -0400
- Cc: egcs at cygnus dot com
I have been looking over the optimized PowerPC code that GCC
produces from your examples and it is equally hideous: load register with
zero, copy the zero register, compare the zero register against zero. GCC
is recognizing that the shifts and zero-extends are producing zeros but it
is not propagating that information.
I can see that combine.c should do some of this, but the IBM XLC
compiler *front-end* generates
COMPARE [0,pseudo] [0,0]
for
int f2(long long foo, unsigned int x)
{
return (foo & x) != 0;
}
when targeting 32-bits. The front-end can and should deduce the zero
value in this case.
In the case of the f1 example,
int f1(unsigned long long foo)
{
return (foo >> 32) != 0;
}
IBM's backend optimization recognizes that shifting the quantity will
produce a zero and later removes the useless compare.
This latter one seems like a case of value / range propagation for
the most common cases of all zeros and all ones involving logical and
rotate / shift / insert / extract operations.
Maybe SUBREG is the problem, but I don't understand why these
constant values cannot be propagated through SUBREGs.
David