Re: some Sparc hackery in the works

[Joern Rennecke <amylaar at cygnus dot co dot uk>]

> 1) Make all RTL ever generated by the Sparc back end have a
>    one to one correspondance between RTL insns and real Sparc
>    insns.
> 
>    For certain classes of operations the Sparc backend currently
>    generates multiple sparc insns per RTL insn.  This is bad for
>    two reasons:
> 
> 	a) Less accurate schedules are obtained
> 	b) reorg can't fill as many delay slots
> 
>    The first major obstacle here were the move patterns.  I rewrote
>    them completely, happily half of sparc.c disappeared as things
>    such as emit_move_sequence, output_move_double etc. were no longer
>    needed.
> 
>    The remaining cases (most of which I haven't gotten to yet) to fix
>    this issue completely have to do with multi-register (DI mode etc.)
>    integer operations on sparc32, some PIC patterns, and the next
>    topic.

You usually get worse code if you try to open-code DImode operations as
RTL at rtl generation time.
You can get the same benefit for scheduling and delay slot filling if you
povide define_splits for the patterns in question; you can then also
safe the output template by replacing it with a '#', to indicate that
this pattern must be split.