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Feature request: ability to describe x86 register halves as contraints.
- To: egcs at cygnus dot com
- Subject: Feature request: ability to describe x86 register halves as contraints.
- From: ak at muc dot de
- Date: Mon, 29 Jun 1998 18:44:04 +0200
Hallo,
Egcs does not handle x86 register halves (al/ah etc.) well. Although
it is able to turn (x & 0xFF) into an access to the rL register, there
is no way to trick it into generating write access to rH registers
(neither union { char h,l; short val } x; x.h = 1; nor and/shift/or tricks
work).
It is often good for the code to use the register halves, because in
algorithms which operate on 8 values (e.g. some ciphers) the ability
to access register halves effectively adds 4 more 8bit registers.
Because the x86 CPUs are so register starved this can speed some inner
loops up considerably.
I understand that making gcc do this automatically is a non-trivial
amount of work.
To optimize a critical inner loop I've resorted to use inline assembly
in some critical computations to work directly on the 8bit halves.
Unfortunately I've hit a limitation of the gcc constraints language
now. There is no way to describe:
"Give me a 16bit register, but insert the high/low byte form of the register-
name here."
e.g. it should pass in a 16bit value in a register like AX, but insert
into the assembler template AH or AL depending on a special flag.
The only way to do this is to use fixed input registers and hardcode the
register halves. Unfortunately this adds some compiler version dependencies
to my code, and also limits the possibilities of the compiler to do other
optimizations.
Is it possible to add such an extension to the constraints language?
Hopefully only minimal changes should be needed for this.
-Andi