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egcs, warning fixes for mips-sgi-irix6.2
- To: egcs at cygnus dot com
- Subject: egcs, warning fixes for mips-sgi-irix6.2
- From: "Kaveh R. Ghazi" <ghazi at caip dot rutgers dot edu>
- Date: Wed, 4 Mar 1998 12:17:50 -0500 (EST)
- Cc: wilson at cygnus dot com
This patch cleans up ~500 warnings on mips-sgi-irix6.2. Is is
okay to install?
--Kaveh
Wed Mar 4 10:32:50 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* mips/iris6.h (TARGET_DEFAULT): Parenthesize macro definition.
* mips/mips.c: Include stdlib.h and unistd.h.
(mips_asm_file_end): Add braces around empty body in an if-statement.
(function_prologue): Wrap variable `fnname' in
!FUNCTION_NAME_ALREADY_DECLARED. Correct format specifier in fprintf.
(mips_select_rtx_section, mips_select_section): Declare as void.
* mips/mips.h: Add prototypes for extern functions in mips.c.
(FUNCTION_ARG_REGNO_P): Add parentheses around && within ||.
(ENCODE_SECTION_INFO): Add braces around empty body in an
if-statement.
* mips/mips.md (movdi): Add parentheses around && within ||.
(movsf, movdf): Likewise.
(branch_zero, branch_zero_di): Add default case in enumeration switch.
diff -r -u -p orig/egcs-980302/gcc/config/mips/iris6.h egcs-980302/gcc/config/mips/iris6.h
--- orig/egcs-980302/gcc/config/mips/iris6.h Fri Jan 2 17:50:23 1998
+++ egcs-980302/gcc/config/mips/iris6.h Tue Mar 3 16:37:44 1998
@@ -24,7 +24,7 @@ Boston, MA 02111-1307, USA. */
#define MULTILIB_DEFAULTS { "mabi=n32" }
#ifndef TARGET_DEFAULT
-#define TARGET_DEFAULT MASK_ABICALLS|MASK_FLOAT64|MASK_64BIT
+#define TARGET_DEFAULT (MASK_ABICALLS|MASK_FLOAT64|MASK_64BIT)
#endif
#include "mips/iris5.h"
diff -r -u -p orig/egcs-980302/gcc/config/mips/mips.c egcs-980302/gcc/config/mips/mips.c
--- orig/egcs-980302/gcc/config/mips/mips.c Mon Feb 16 01:26:59 1998
+++ egcs-980302/gcc/config/mips/mips.c Tue Mar 3 16:37:44 1998
@@ -29,6 +29,12 @@ Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
#include "rtl.h"
#include "regs.h"
@@ -5332,7 +5338,9 @@ mips_asm_file_end (file)
int len;
if (HALF_PIC_P ())
- HALF_PIC_FINISH (file);
+ {
+ HALF_PIC_FINISH (file);
+ }
if (extern_head)
{
@@ -6079,7 +6087,9 @@ function_prologue (file, size)
FILE *file;
int size;
{
+#ifndef FUNCTION_NAME_ALREADY_DECLARED
char *fnname;
+#endif
long tsize = current_frame_info.total_size;
ASM_OUTPUT_SOURCE_FILENAME (file, DECL_SOURCE_FILE (current_function_decl));
@@ -6118,7 +6128,7 @@ function_prologue (file, size)
if (!flag_inhibit_size_directive)
{
- fprintf (file, "\t.frame\t%s,%d,%s\t\t# vars= %d, regs= %d/%d, args= %d, extra= %d\n",
+ fprintf (file, "\t.frame\t%s,%ld,%s\t\t# vars= %ld, regs= %d/%d, args= %d, extra= %ld\n",
reg_names[ (frame_pointer_needed) ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM ],
tsize,
reg_names[31 + GP_REG_FIRST],
@@ -6856,6 +6866,7 @@ mips_can_use_return_insn ()
/* Choose the section to use for the constant rtx expression X that has
mode MODE. */
+void
mips_select_rtx_section (mode, x)
enum machine_mode mode;
rtx x;
@@ -6889,6 +6900,7 @@ mips_select_rtx_section (mode, x)
/* Choose the section to use for DECL. RELOC is true if its value contains
any relocatable expression. */
+void
mips_select_section (decl, reloc)
tree decl;
int reloc;
diff -r -u -p orig/egcs-980302/gcc/config/mips/mips.h egcs-980302/gcc/config/mips/mips.h
--- orig/egcs-980302/gcc/config/mips/mips.h Tue Feb 17 13:31:01 1998
+++ egcs-980302/gcc/config/mips/mips.h Tue Mar 3 20:16:10 1998
@@ -164,6 +164,7 @@ extern int arith32_operand ();
extern int arith_operand ();
extern int cmp_op ();
extern long compute_frame_size ();
+extern int const_float_1_operand ();
extern void expand_block_move ();
extern int equality_op ();
extern void final_prescan_insn ();
@@ -181,6 +182,7 @@ extern int large_int ();
extern int mips_address_cost ();
extern void mips_asm_file_end ();
extern void mips_asm_file_start ();
+extern int mips_can_use_return_insn ();
extern int mips_const_double_ok ();
extern void mips_count_memory_refs ();
extern int mips_debugger_offset ();
@@ -215,19 +217,23 @@ extern void mips_order_regs_for_local_a
extern struct rtx_def * mips16_gp_pseudo_reg ();
extern struct rtx_def * mips16_gp_offset ();
extern int mips16_gp_offset_p ();
+extern int mips16_constant ();
extern int mips16_constant_after_function_p ();
extern int build_mips16_call_stub ();
/* Recognition functions that return if a condition is true. */
extern int address_operand ();
+extern int call_insn_operand ();
extern int const_double_operand ();
extern int const_int_operand ();
+extern int consttable_operand ();
extern int general_operand ();
extern int immediate_operand ();
extern int memory_address_p ();
extern int memory_operand ();
extern int nonimmediate_operand ();
extern int nonmemory_operand ();
+extern int pic_address_needs_scratch ();
extern int register_operand ();
extern int scratch_operand ();
extern int move_operand ();
@@ -263,6 +269,8 @@ extern void rdata_section ();
extern void readonly_data_section ();
extern void sdata_section ();
extern void text_section ();
+extern void mips_select_rtx_section ();
+extern void mips_select_section ();
/* Stubs for half-pic support if not OSF/1 reference platform. */
@@ -2321,10 +2329,10 @@ extern struct mips_frame_info current_fr
#define FUNCTION_ARG_REGNO_P(N) \
(((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \
- || (! TARGET_SOFT_FLOAT \
+ || ((! TARGET_SOFT_FLOAT \
&& ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST) \
&& (TARGET_FLOAT64 || (0 == (N) % 2))) \
- && ! fixed_regs[N])
+ && ! fixed_regs[N]))
/* A C expression which can inhibit the returning of certain function
values in registers, based on the type of value. A nonzero value says
@@ -3040,7 +3048,9 @@ do \
} \
\
else if (HALF_PIC_P ()) \
- HALF_PIC_ENCODE (DECL); \
+ { \
+ HALF_PIC_ENCODE (DECL); \
+ } \
} \
while (0)
diff -r -u -p orig/egcs-980302/gcc/config/mips/mips.md egcs-980302/gcc/config/mips/mips.md
--- orig/egcs-980302/gcc/config/mips/mips.md Thu Feb 12 06:06:08 1998
+++ egcs-980302/gcc/config/mips/mips.md Tue Mar 3 20:56:36 1998
@@ -4420,8 +4420,8 @@ move\\t%0,%z4\\n\\
&& !register_operand (operands[0], DImode)
&& !register_operand (operands[1], DImode)
&& (TARGET_MIPS16
- || (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) != 0)
- && operands[1] != CONST0_RTX (DImode)))
+ || ((GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) != 0)
+ && operands[1] != CONST0_RTX (DImode))))
{
rtx temp = force_reg (DImode, operands[1]);
emit_move_insn (operands[0], temp);
@@ -5500,8 +5500,8 @@ move\\t%0,%z4\\n\\
&& !register_operand (operands[0], SFmode)
&& !register_operand (operands[1], SFmode)
&& (TARGET_MIPS16
- || (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) != 0)
- && operands[1] != CONST0_RTX (SFmode)))
+ || ((GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) != 0)
+ && operands[1] != CONST0_RTX (SFmode))))
{
rtx temp = force_reg (SFmode, operands[1]);
emit_move_insn (operands[0], temp);
@@ -5560,8 +5560,8 @@ move\\t%0,%z4\\n\\
&& !register_operand (operands[0], DFmode)
&& !register_operand (operands[1], DFmode)
&& (TARGET_MIPS16
- || (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) != 0)
- && operands[1] != CONST0_RTX (DFmode)))
+ || ((GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) != 0)
+ && operands[1] != CONST0_RTX (DFmode))))
{
rtx temp = force_reg (DFmode, operands[1]);
emit_move_insn (operands[0], temp);
@@ -7140,6 +7140,8 @@ move\\t%0,%z4\\n\\
case LEU: return \"%*beq%?\\t%z1,%.,%2\";
case GEU: return \"%*j\\t%2\";
case LTU: return \"%*bne%?\\t%.,%.,%2\";
+ default:
+ break;
}
return \"%*b%C0z%?\\t%z1,%2\";
@@ -7154,6 +7156,8 @@ move\\t%0,%z4\\n\\
case LEU: return \"%*bne%?\\t%z1,%.,%3\";
case GEU: return \"%*beq%?\\t%.,%.,%3\";
case LTU: return \"%*j\\t%3\";
+ default:
+ break;
}
return \"%*b%N0z%?\\t%z1,%3\";
@@ -7214,6 +7218,8 @@ move\\t%0,%z4\\n\\
case LEU: return \"%*beq%?\\t%z1,%.,%2\";
case GEU: return \"%*j\\t%2\";
case LTU: return \"%*bne%?\\t%.,%.,%2\";
+ default:
+ break;
}
return \"%*b%C0z%?\\t%z1,%2\";
@@ -7228,6 +7234,8 @@ move\\t%0,%z4\\n\\
case LEU: return \"%*bne%?\\t%z1,%.,%3\";
case GEU: return \"%*beq%?\\t%.,%.,%3\";
case LTU: return \"%*j\\t%3\";
+ default:
+ break;
}
return \"%*b%N0z%?\\t%z1,%3\";
--
Kaveh R. Ghazi Project Manager / Custom Development
ghazi@caip.rutgers.edu ICon CMT Corp.