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Re: base + index register addressing
- To: "Michael P. Hayes" <michaelh at ongaonga dot chch dot cri dot nz>
- Subject: Re: base + index register addressing
- From: Jeffrey A Law <law at cygnus dot com>
- Date: Fri, 17 Oct 1997 17:56:14 -0600
- cc: meissner at cygnus dot com, egcs at cygnus dot com, gcc2 at cygnus dot com
- Reply-To: law at cygnus dot com
In message <199710172339.MAA26949@ongaonga.chch.cri.nz>you write:
> Most of the utility of the patch occurs when an incoming function
> argument is in a hard base (or possibly index) register.
Yup. I'm all too aware of losing base vs index distinctions
when hard argument registers.
You see, on the PA, it's absolutely critical that we be able to
distinguish the base from the index -- if you reverse them in a
memory reference it will fail at runtime. Furthermore, any
general register can be a base or index. Thus we can't use a
set of registers to know which is the base and which is the index.
Most of the time we can figure out which is the base by looking
at REGNO_POINTER_FLAG. However, that can't detect cases where
a pass eliminates a copy from a hard incoming arg register to
a pseudo with REGNO_POINTER_FLAG set.
> IMO, things would be simpler if two register addresses were
> canonicalized so that the base register preceeded the index register,
> i.e., (mem (plus (base_reg) (index_reg)). This would reduce the
> ambiguity when it comes to allocating base and index registers.
Yes. I even proposed this once and Kenner rejected the idea.
jeff