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Re: target/9757: Gcc should use swp instruction in ARM targets
- From: rearnsha at gcc dot gnu dot org
- To: gcc-bugs at gcc dot gnu dot org, gcc-prs at gcc dot gnu dot org, gertom at rgai dot hu, nobody at gcc dot gnu dot org
- Date: 20 Feb 2003 12:13:24 -0000
- Subject: Re: target/9757: Gcc should use swp instruction in ARM targets
- Reply-to: rearnsha at gcc dot gnu dot org, gcc-bugs at gcc dot gnu dot org, gcc-prs at gcc dot gnu dot org, gertom at rgai dot hu, nobody at gcc dot gnu dot org, gcc-gnats at gcc dot gnu dot org
Synopsis: Gcc should use swp instruction in ARM targets
State-Changed-From-To: open->closed
State-Changed-By: rearnsha
State-Changed-When: Thu Feb 20 12:13:24 2003
State-Changed-Why:
No, the SWP instruction should not be used. For several reasons.
1) It's very slow on some processors, since it forces an external bus access even if the data is already in the cache.
2) It's behaviour is not defined if access is made to a MMU managed page that is non-cacheable/bufferable.
http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=9757