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Re: libstdc++/9697: invalid instruction
- From: Mark_Hamilton at 3com dot com
- To: nobody at gcc dot gnu dot org
- Cc: gcc-prs at gcc dot gnu dot org,
- Date: 17 Feb 2003 22:06:01 -0000
- Subject: Re: libstdc++/9697: invalid instruction
- Reply-to: Mark_Hamilton at 3com dot com
The following reply was made to PR libstdc++/9697; it has been noted by GNATS.
From: Mark_Hamilton@3com.com
To: <gcc-gnats@gcc.gnu.org>, <gcc-bugs@gcc.gnu.org>, <nobody@gcc.gnu.org>,
<gcc-prs@gcc.gnu.org>, Mark Hamilton <mark_lee_hamilton@worldnet.att.net>
Cc:
Subject: Re: libstdc++/9697: invalid instruction
Date: Mon, 17 Feb 2003 14:04:53 -0800
I may have fixed my own bug. Is someone interested in verifying my fix. I'm
not much of an assembly person. I've attached the files that I modified. To
summarize the 68000 and 5200 processors do not support bsr.l. That I've
verified from the appropriate manuals. The gcc m68k.md and m68k.h didn't
take these into account. I modified m68k.md and m68k.h from the gcc-3.2.2
tar ball to check for 68000 and 5200. If so then jsr is used instead of
bsr.l. The jsr instruction take an absolute value where as the bsr takes a
relative address. The m68k.h needs to use the appropriate assembly for both
PIC and non-PIC code. I posted a bug on this 9697.
http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&p
r=9697