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Re: target/9617: gcc/ia64: bad code generated for __builtin_ia64_bsp()


The following reply was made to PR target/9617; it has been noted by GNATS.

From: Jim Wilson <wilson@redhat.com>
To: davidm@hpl.hp.com
Cc: gcc-gnats@gcc.gnu.org, rth@redhat.com
Subject: Re: target/9617: gcc/ia64: bad code generated for __builtin_ia64_bsp()
Date: 10 Feb 2003 15:16:11 -0500

 Any pattern which emits multiple lines of assembly via \; needs special
 handling for the qualifying predicate.  Or else it needs to be marked as
 being not predicable.  I see 4 patterns which get this wrong, including the
 builtin_ia64_bsp one that you just reported.
 
 Here is a tentative patch to fix the problem.  This works for your testcase.
 This patch is off of the gcc-3.2.2 sources.
 
 Unfortunately, the current FSF gcc sources didn't build for me, so I will
 have to look into that before I can do a full test.  In parcticular, I want
 to verify the changes to the FP patterns before I check this in.  I don't
 have a testcase for them at the moment.
 
 2003-02-10  Jim Wilson  <wilson@redhat.com>
 
 	* config/ia64/ia64.md (floatdidf2, floatdisf2): Add %, before second
 	instruction in output template.
 	(bsp_value): Change output template from string to C code, add %,
 	before actual instruction.
 	(flushrs): Mark as not predicable.
 
 *** ia64.md.orig	Mon Feb 10 14:47:40 2003
 --- ia64.md	Mon Feb 10 15:06:56 2003
 ***************
 *** 902,908 ****
     [(set (match_operand:DF 0 "register_operand" "=f")
           (float:DF (match_operand:DI 1 "register_operand" "f")))]
     "!INTEL_EXTENDED_IEEE_FORMAT"
 !   "fcvt.xf %0 = %1\;;;\;fnorm.d %0 = %0"
     [(set_attr "itanium_class" "fcvtfx")])
   
   ;; ??? Suboptimal.  This should be split somehow.
 --- 902,908 ----
     [(set (match_operand:DF 0 "register_operand" "=f")
           (float:DF (match_operand:DI 1 "register_operand" "f")))]
     "!INTEL_EXTENDED_IEEE_FORMAT"
 !   "fcvt.xf %0 = %1\;;;\;%,fnorm.d %0 = %0"
     [(set_attr "itanium_class" "fcvtfx")])
   
   ;; ??? Suboptimal.  This should be split somehow.
 ***************
 *** 910,916 ****
     [(set (match_operand:SF 0 "register_operand" "=f")
           (float:SF (match_operand:DI 1 "register_operand" "f")))]
     "!INTEL_EXTENDED_IEEE_FORMAT"
 !   "fcvt.xf %0 = %1\;;;\;fnorm.s %0 = %0"
     [(set_attr "itanium_class" "fcvtfx")])
   
   (define_insn "fix_truncsfdi2"
 --- 910,916 ----
     [(set (match_operand:SF 0 "register_operand" "=f")
           (float:SF (match_operand:DI 1 "register_operand" "f")))]
     "!INTEL_EXTENDED_IEEE_FORMAT"
 !   "fcvt.xf %0 = %1\;;;\;%,fnorm.s %0 = %0"
     [(set_attr "itanium_class" "fcvtfx")])
   
   (define_insn "fix_truncsfdi2"
 ***************
 *** 4946,4952 ****
     [(set (match_operand:DI 0 "register_operand" "=r")
   	(unspec:DI [(const_int 0)] 20))]
     ""
 !   ";;\;mov %0 = ar.bsp"
     [(set_attr "itanium_class" "frar_i")])
   
   (define_insn "set_bsp"
 --- 4946,4955 ----
     [(set (match_operand:DI 0 "register_operand" "=r")
   	(unspec:DI [(const_int 0)] 20))]
     ""
 !   "*
 ! {
 !   return \";;\;%,mov %0 = ar.bsp\";
 ! }"
     [(set_attr "itanium_class" "frar_i")])
   
   (define_insn "set_bsp"
 ***************
 *** 4964,4970 ****
     [(unspec [(const_int 0)] 21)]
     ""
     ";;\;flushrs\;;;"
 !   [(set_attr "itanium_class" "rse_m")])
   
   ;; ::::::::::::::::::::
   ;; ::
 --- 4967,4974 ----
     [(unspec [(const_int 0)] 21)]
     ""
     ";;\;flushrs\;;;"
 !   [(set_attr "itanium_class" "rse_m")
 !    (set_attr "predicable" "no")])
   
   ;; ::::::::::::::::::::
   ;; ::


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