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Re: [PATCH] RISC-V: Disallow regrenme if the TO register never used before for interrupt functions
- From: Jim Wilson <jimw at sifive dot com>
- To: Kito Cheng <kito dot cheng at sifive dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>, Kito Cheng <kito dot cheng at gmail dot com>
- Date: Mon, 20 Jan 2020 15:13:26 -0800
- Subject: Re: [PATCH] RISC-V: Disallow regrenme if the TO register never used before for interrupt functions
- References: <20200120080401.61443-1-kito.cheng@sifive.com>
On Mon, Jan 20, 2020 at 12:04 AM Kito Cheng <kito.cheng@sifive.com> wrote:
> gcc/ChangeLog
>
> PR target/93304
> * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
> * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
> * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
>
> gcc/testsuite/ChangeLog
>
> PR target/93304
> * gcc.target/riscv/pr93304.c: New test.
OK.
By the way, you don't need blank lines after the PR target/93304.
Jim