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[committed][AArch64] Pass a mode to some SVE immediate queries
- From: Richard Sandiford <richard dot sandiford at arm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Thu, 09 Jan 2020 16:55:22 +0000
- Subject: [committed][AArch64] Pass a mode to some SVE immediate queries
It helps the SVE2 ACLE support if aarch64_sve_arith_immediate_p and
aarch64_sve_sqadd_sqsub_immediate_p accept scalars as well as vectors.
Tested on aarch64-linux-gnu and applied as r280059.
Richard
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
(aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
* config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
(aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
immediates as well as vector ones.
* config/aarch64/predicates.md (aarch64_sve_arith_immediate)
(aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
(aarch64_sve_qsub_immediate): Update calls accordingly.
Index: gcc/config/aarch64/aarch64-protos.h
===================================================================
--- gcc/config/aarch64/aarch64-protos.h 2020-01-07 10:18:06.568651579 +0000
+++ gcc/config/aarch64/aarch64-protos.h 2020-01-09 16:26:30.554983913 +0000
@@ -550,8 +550,8 @@ bool aarch64_simd_valid_immediate (rtx,
enum simd_immediate_check w = AARCH64_CHECK_MOV);
rtx aarch64_check_zero_based_sve_index_immediate (rtx);
bool aarch64_sve_index_immediate_p (rtx);
-bool aarch64_sve_arith_immediate_p (rtx, bool);
-bool aarch64_sve_sqadd_sqsub_immediate_p (rtx, bool);
+bool aarch64_sve_arith_immediate_p (machine_mode, rtx, bool);
+bool aarch64_sve_sqadd_sqsub_immediate_p (machine_mode, rtx, bool);
bool aarch64_sve_bitmask_immediate_p (rtx);
bool aarch64_sve_dup_immediate_p (rtx);
bool aarch64_sve_cmp_immediate_p (rtx, bool);
Index: gcc/config/aarch64/aarch64.c
===================================================================
--- gcc/config/aarch64/aarch64.c 2020-01-09 15:23:52.039234973 +0000
+++ gcc/config/aarch64/aarch64.c 2020-01-09 16:26:30.562983860 +0000
@@ -16407,22 +16407,20 @@ aarch64_sve_index_immediate_p (rtx base_
&& IN_RANGE (INTVAL (base_or_step), -16, 15));
}
-/* Return true if X is a valid immediate for the SVE ADD and SUB
- instructions. Negate X first if NEGATE_P is true. */
+/* Return true if X is a valid immediate for the SVE ADD and SUB instructions
+ when applied to mode MODE. Negate X first if NEGATE_P is true. */
bool
-aarch64_sve_arith_immediate_p (rtx x, bool negate_p)
+aarch64_sve_arith_immediate_p (machine_mode mode, rtx x, bool negate_p)
{
- rtx elt;
-
- if (!const_vec_duplicate_p (x, &elt)
- || !CONST_INT_P (elt))
+ rtx elt = unwrap_const_vec_duplicate (x);
+ if (!CONST_INT_P (elt))
return false;
HOST_WIDE_INT val = INTVAL (elt);
if (negate_p)
val = -val;
- val &= GET_MODE_MASK (GET_MODE_INNER (GET_MODE (x)));
+ val &= GET_MODE_MASK (GET_MODE_INNER (mode));
if (val & 0xff)
return IN_RANGE (val, 0, 0xff);
@@ -16430,23 +16428,19 @@ aarch64_sve_arith_immediate_p (rtx x, bo
}
/* Return true if X is a valid immediate for the SVE SQADD and SQSUB
- instructions. Negate X first if NEGATE_P is true. */
+ instructions when applied to mode MODE. Negate X first if NEGATE_P
+ is true. */
bool
-aarch64_sve_sqadd_sqsub_immediate_p (rtx x, bool negate_p)
+aarch64_sve_sqadd_sqsub_immediate_p (machine_mode mode, rtx x, bool negate_p)
{
- rtx elt;
-
- if (!const_vec_duplicate_p (x, &elt)
- || !CONST_INT_P (elt))
- return false;
-
- if (!aarch64_sve_arith_immediate_p (x, negate_p))
+ if (!aarch64_sve_arith_immediate_p (mode, x, negate_p))
return false;
/* After the optional negation, the immediate must be nonnegative.
E.g. a saturating add of -127 must be done via SQSUB Zn.B, Zn.B, #127
instead of SQADD Zn.B, Zn.B, #129. */
+ rtx elt = unwrap_const_vec_duplicate (x);
return negate_p == (INTVAL (elt) < 0);
}
Index: gcc/config/aarch64/predicates.md
===================================================================
--- gcc/config/aarch64/predicates.md 2020-01-06 12:58:16.457794543 +0000
+++ gcc/config/aarch64/predicates.md 2020-01-09 16:26:30.562983860 +0000
@@ -636,19 +636,19 @@ (define_predicate "aarch64_sve_ptrue_svp
(define_predicate "aarch64_sve_arith_immediate"
(and (match_code "const,const_vector")
- (match_test "aarch64_sve_arith_immediate_p (op, false)")))
+ (match_test "aarch64_sve_arith_immediate_p (mode, op, false)")))
(define_predicate "aarch64_sve_sub_arith_immediate"
(and (match_code "const,const_vector")
- (match_test "aarch64_sve_arith_immediate_p (op, true)")))
+ (match_test "aarch64_sve_arith_immediate_p (mode, op, true)")))
(define_predicate "aarch64_sve_qadd_immediate"
(and (match_code "const,const_vector")
- (match_test "aarch64_sve_sqadd_sqsub_immediate_p (op, false)")))
+ (match_test "aarch64_sve_sqadd_sqsub_immediate_p (mode, op, false)")))
(define_predicate "aarch64_sve_qsub_immediate"
(and (match_code "const,const_vector")
- (match_test "aarch64_sve_sqadd_sqsub_immediate_p (op, true)")))
+ (match_test "aarch64_sve_sqadd_sqsub_immediate_p (mode, op, true)")))
(define_predicate "aarch64_sve_vector_inc_dec_immediate"
(and (match_code "const,const_vector")