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Re: [PATCH] [MIPS] Prevent MSA branches from being put into delay slots
- From: Dragan Mladjenovic <dmladjenovic at wavecomp dot com>
- To: Jeff Law <law at redhat dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Cc: Matthew Fortune <mfortune at gmail dot com>
- Date: Wed, 20 Nov 2019 06:56:57 +0000
- Subject: Re: [PATCH] [MIPS] Prevent MSA branches from being put into delay slots
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On 16.11.2019. 00:33, Jeff Law wrote:
> On 11/15/19 10:27 AM, Dragan Mladjenovic wrote:
>> From: "Dragan Mladjenovic" <dmladjenovic@wavecomp.com>
>>
>> This patch tightens the instruction definitions to make sure
>> that MSA branch instructions cannot be put into delay slots and have their
>> delay slots eligible for being filled. Also, MSA *div*3 patterns use MSA
>> branches for zero checks but are not marked as being multi instruction and
>> thus could be put into delay slots. This patch fixes that.
>>
>> Testcase only covers if MSA branch delay slot is being filled.
>>
>> gcc/ChangeLog:
>>
>> 2019-11-15 Zoran Jovanovic <zoran.jovanovic@mips.com>
>> Dragan Mladjenovic <dmladjenovic@wavecomp.com>
>>
>> * config/mips/mips-msa.md (msa_<msabr>_<msafmt_f>, msa_<msabr>_v_<msafmt_f>):
>> Mark as not having "likely" version.
>> * config/mips/mips.md (insn_count): The simd_div instruction with
>> TARGET_CHECK_ZERO_DIV consists of 3 instructions.
>> (can_delay): Exclude simd_branch.
>> (defile_delay *): Add simd_branch instructions.
>> They have one regular delay slot.
> OK
> jeff
>
Thanks, committed as r278458.
Dragan